Notice Board!

Exam might be preponed to saturday

Binary to Gray Using STRUCTURAL MODELLING

VHDL Code for Binary to Gray Using STRUCTURAL MODELLING

library ieee;

use ieee.std_logic_1164.all;

entity btog is

port(b3,b2,b1,b0: in bit; g3, g2, g1, g0: out bit);

Wavefrom and vhdl code for Binary to Gray converter

Wavefrom and vhdl code for Binary to Gray converter

Waveform for BINARY to GRAY and BINARY to EXCESS-3

VHDL code for Binary to GRAY

VHDL code for Binary to GRAY

DCS-II Experiment-5

library ieee;

use ieee.std_logic_1164.all;

entity b_to_g is 

port(b: in bit_vector(0 to 3); grey: out bit_vector( 0 to 3));

end b_to_g;

VHDL code for Binary to Excess-3

VHDL code for Binary to Excess-3 using DATAFLOW

DCS-II experiment-5

library ieee;

use ieee.std_logic_1164.all;

Attendance ECE-II

September 2013

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